One type of a conventional memory device with current mirror type sense amplifiers comprises a reference memory cell unit, a plurality of information memory cell units arranged in matrix a pattern, a plurality of sense amplifiers connected to columns of the information memory cell units, and a plurality of address decoder units connected to rows of the information memory cell units. The reference memory cell unit comprises a selection NMOS transistor, and three NMOS transistors for reference memory cells, one of which is a depletion type transistor connected at a gate to ground. Each of the information memory cell units comprises a selection NMOS transistor, and three NMOS transistors for information memory cells, one of which is a depletion type, and each of the address decoder units comprises a selector connected through a selection line to the selection NMOS transistors at each row, and a three-bit address decoder connected through three word lines to the three NMOS transistors for information memory cells. Each of the sense amplifiers is connected through a common reference voltage line to the reference memory cell unit and through a digit line to the information memory cell units in each column.
In operation, a reference voltage is applied through the reference voltage line to the sense amplifiers by the reference memory cell unit. At the same time, one of the selection lines is selected by receiving a signal of "1" from a selector of an address decoder unit belonging to a selected row. In this situation, a three-bit word line signal of, for instance, "1", "0" and "1" is applied to three word lines of the selected row. In one of the information memory cell units of the selected row, if the signal of "0" is applied to an NMOS transistor of the depletion type among the three information memory cell NMOS transistors, a content of "1" is read from the memory cell through a digit line to an output signal line by one of the sense amplifier. On the other hand, if the signal of "0" is applied to one of the NMOS transistors (non-depletion type) for information memory cells, a content of "0" is read from the memory cell.
In the conventional mirror type memory device, however, there is a disadvantage in that unified characteristics are difficult to obtained between the reference memory cells and the information memory cells of a matrix pattern, because the reference memory cell unit and the information memory cell units are arranged with considerable distances in a semiconductor integrated circuit to result in the unevenness among those cells, as long as an ordinary fabrication process is adopted. In this conventional mirror type memory device, the unevenness of the characteristics becomes more remarkable due to the difference of gate signals applied through independent signal lines to those cells.